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Switching entersub ops from "XS" to "Perl" and back likely won't help.
Switching OPs goes against the grain of immutable optrees under ithreads -
it could probably be made to work, but the amount of extra effort would be
non-trivial.
Secondly, cache misses are the overriding speed hit on modern CPUs.
The code switching proposed would add complexity but only be able to change
the number of branch instructions encountered, which come a distant second
to cache misses as a speed hit. The code switching would not change the data
lookups needed, and hence not the cache misses they cause.